Everspin Technologies, Inc. (NASDAQ:MRAM) Files An 8-K Results of Operations and Financial ConditionItem 2.02 Results of Operations and Financial Condition.
On August10, 2017, Everspin Technologies, Inc., or the Company, issued a press release announcing its financial results for the second quarter ended June30, 2017. The press release is attached as Exhibit 99.1 and is incorporated herein by reference.
The information in this Item 2.02 and the related Exhibit 99.1 is furnished and shall not be deemed “filed” for purposes of Section18 of the Securities Exchange Act of 1934, as amended, or subject to the liabilities of that Section or Sections 11 and 12(a)(2) of the Securities Act of 1933, as amended. The information in this Item 2.02 and the related Exhibit 99.1 shall not be incorporated by reference in any filing with the U.S. Securities and Exchange Commission made by the Company, whether made before or after the date hereof, regardless of any general incorporation language in such filing.
Item 2.02 Financial Statements and Exhibits.
(d) Exhibits
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Exhibit No. |
Description |
| 99.1 | Press Release, dated August10, 2017. |
EVERSPIN TECHNOLOGIES INC ExhibitEX-99.1 2 d398882dex991.htm EX-99.1 EX-99.1 Exhibit 99.1 Everspin Announces Second Quarter 2017 Financial Results Chandler,…To view the full exhibit click here
About Everspin Technologies, Inc. (NASDAQ:MRAM)
Everspin Technologies, Inc. is a United States-based provider of magnetoresistive random-access memory (MRAM) solutions. The Company is engaged in designing, manufacturing and shipping discrete and embedded MRAM and spin-torque MRAM (ST-MRAM) into markets and applications. The Company’s products include 8-bit/16-bit Parallel Interface MRAM, Serial Peripheral Interface (SPI), Quad SPI and Double Data Rate (DDR) 3 dynamic random-access memory (DRAM) Compatible MRAM – Spin Torque Technology. The Company’s MR10Q010 Quad SPI MRAM is a memory solution for applications that store and retrieve data and programs. Its DDR3 DRAM Compatible MRAM – Spin Torque Technology is designed to comply with all DDR3 DRAM features, such as on-device termination (ODT) and internal ZQ calibration. Its family of both parallel asynchronous input/output (I/O) and serial peripheral interface (SPI) products in densities ranging from 256 kilobyte (Kb) to 16 megabyte (Mb) is available in die form.